2014 IES Previous papers for Electrical, Electronics (E & T), Civil and Mechanical branches

UPSC IES 2014 Engineering Services Exam Previous papers -
Conventional Paper - 1 , & Conventional Paper - 2
Objective Paper - 1 & Objective Paper - 2
All Branches (Civil, Mechanical, Electrical, Electronics & Telecommunications)

ENGINEERING SERVICES EXAMINATION, 2014
General Ability Test
Objective Papers
Civil Engineering      Paper - I	Civil Engineering      Paper -  II
Mechanical Engineering Paper - I	Mechanical Engineering Paper - II
Electrical Engineering Paper - I	Electrical Engineering Paper - II
E & T Engineering    Paper - I	E & T Engineering   Paper - II
Conventional Papers
Civil Engineering     Paper - I	Civil Engineering     Paper - II
Mechanical Engineering Paper - I	Mechanical Engineering Paper - II
Electrical Engineering Paper - I	Electrical Engineering Paper - II
E & T Engineering   Paper - I	E & T Engineering    Paper - II

Chapter wise GATE Questions and Solutions on Electronic Devices & Circuits, Digital Electronics and Analog Circuits

Topic wise GATE questions on EDC, Electronic Circuit Analysis(ECA), Analog and Digital IC Applications (ADIC) , Pulse and Digital Circuits (PDC), Switching Theory and Logic Design (STLD), Operational Amplifiers, Linear IC Applications (LICA) , Microprocessors & Micro controlloers, 8085 Microprocessors, 8086 Microprocessor and Microprocessors & Interfacing.

Topic wise Previous GATE Questions
Electron Devices	Analog Circuits	Digital Circuits
Semiconductors	Diode Applications	Number Systems
PN Junction (Diode)	Transistor Biasing	Logic Gates
Zener Diode	BJT Small signal Analysis	K-Map, SOP and POS
Special Purpose Diodes	BJT at Low and High Frequencies	Combinational Circuits
Transistor (BJT)	FET Amplifiers	Multiplexers
Junction FET (JFET)	Multistage Amplifiers	Latch & Flip-Flops
MOSFET, CMOS & Introduction to VLSI	Negative Feedback Amplifiers	Shift Registers
	Oscillators & Waveform Generators	Counters (Asynchronous & Synchronous)
	Power Amplifiers	Semiconductor Memories
	Operational Amplifiers Set - I   (1987 - 2000) Set - II  (2001 - 2014)	ADC & DAC
	Voltage Regulators	Microprocessors & Memory Mapping
		Logic Families

Assignments, Solutions & Lecture Notes or Lecture PPTs on "MOS VLSI Design" by Prof. Kaushik Roy sir

MOS VLSI Design by Dr. Kaushik Roy sir

Dr. Kaushik Roy

Edward G. Tiedemann Jr. Distinguished Professor

Office: MSEE 232

Office Phone: +1 765 49-42361

E-mail: kaushik@ecn.purdue.edu

Personal Home Page

Address

Purdue University
School of Electrical and Computer Engineering
Electrical Engineering Building
465 Northwestern Ave.
West Lafayette, Indiana 47907-2035

Degrees

• B.Tech (1983), Indian Institute of Technology, Kharagpur
• Ph.D. (1990), University of Illinois at Urbana-Champaign

Research

Low-power electronics, Scaled CMOS devices and circuits, Silicon and Non-Silicon Nanoelectronics,
process variations and design with unreliable components, VLSI signal processing

Areas of Interest

• Communications, Networking, Signal & Image Processing
• VLSI and Circuit Design
• Computer Engineering
• Microelectronics and Nanotechnology

• Indicates primary area for this faculty member. Note that a few faculty members have more than one primary area. 

Course Outcome :

A student who successfully fulfills the course requirements will have demonstrated:

• An ability to analyze MOS circuits
• An ability to synthesize MOS circuits
• Experience in oral presentation, teamwork, and document preparation for a finished design
• An ability to create and simulate a hierarchical digital design using commercial grade CAD software