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Assignments, Solutions & Lecture Notes or Lecture PPTs on "MOS VLSI Design" by Prof. Kaushik Roy sir


MOS VLSI Design by Dr. Kaushik Roy sir

Dr. Kaushik Roy

Edward G. Tiedemann Jr. Distinguished Professor
Office: MSEE 232
Office Phone: +1 765 49-42361
Address
Purdue University
School of Electrical and Computer Engineering
Electrical Engineering Building
465 Northwestern Ave.
West Lafayette, Indiana 47907-2035
Degrees
  • B.Tech (1983), Indian Institute of Technology, Kharagpur
  • Ph.D. (1990), University of Illinois at Urbana-Champaign

Research
Low-power electronics, Scaled CMOS devices and circuits, Silicon and Non-Silicon Nanoelectronics,
process variations and design with unreliable components, VLSI signal processing
Areas of Interest
  • Indicates primary area for this faculty member. Note that a few faculty members have more than one primary area. 
Course Outcome :

A student who successfully fulfills the course requirements will have demonstrated:
  • An ability to analyze MOS circuits
  • An ability to synthesize MOS circuits
  • Experience in oral presentation, teamwork, and document preparation for a finished design
  • An ability to create and simulate a hierarchical digital design using commercial grade CAD software