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IIT video lectures on Analog Circuits by Dr. Shanthi Pavan (IIT Madras)

Video Lecture Series from IIT Professors :

 Analog Circuits by Dr. Shanthi Pavan Sir

Dr.Shanthi Pavan obtained the B.Tech degree in Electronics and Communication Engg from the Indian Institute of Technology, Madras in 1995 and the M.S and Sc.D degrees from Columbia University, New York in 1997 and 1999 respectively. From 1997 to 2000, he was with Texas Instruments in Warren, New Jersey, where he worked on high speed analog filters and data converters. From 2000 to June 2002, he worked on microwave ICs for data communication at Bigbear Networks in Sunnyvale, California. Since July 2002, he has been with the Indian Institute of Technology-Madras, where he is now a Professor of Electrical Engineering. His research interests are in the areas of high speed analog circuit design and signal processing.

Dr.Pavan is the recipient of the IEEE Circuits and Systems Society Darlington Best Paper Award (2009), the Swarnajayanthi Fellowship (2010, from the Government of India) , the Young Faculty Recognition Award from IIT Madras (2009, for excellence in teaching) , the Technomentor Award from the India Semiconductor Association (2010) and the Young Engineer Award from the Indian National Academy of Engineering (2006). He is an Associate Editor of the IEEE Transactions on Circuits and Systems: Part I - Regular Papers, and earlier served on the editorial board of the IEEE Transactions on Circuits and Systems Part II - Express Briefs from 2006-2007.

Lecture 1 - Course overview and introduction.
Lecture 2 - Introduction to nonlinear network elements, the notions of operating point and incremental linearity
Lecture 3 - Nonlinear networks and incremental nonlinear networks
Lecture 4 - Networks with two terminal nonlinear elements, the definition of small signal, nonlinear two port networks
Lecture 5 - Nonlinear two ports, incremental two port parameters, constraints on the incremental Y-matrix to obtain gain
Lecture 6 - Introducing the MOSFET as a natural outcome of the previous lecture, MOS Characteristics
Lecture 7 - MOS Characteristics continued, linear and saturation regions, transconductance
Lecture 8 - Synthesis of the Common Source Amplifier
Lecture 9 - The Common Source amplifier continued, Swing limits
Lecture 10 - Swing Limits continued
Lecture 11 - Swing Limits continued, small signal operation revisited
Lecture 12 - Introduction to stable biasing
Lecture 13 - Bias Stabilization, the current mirror
Lecture 14 - Bias Stabilization, drain feedback
Lecture 15 - Bias Stabilization, source feedback
Lecture 16 - Introduction to negative feedback
Lecture 17 - More on negative feedback
Lecture 18 - Bias Stabilization, drain current measurement and source feedback
Lecture 19 (Part A) - Bias Stabilization continued, the real MOSFET and channel length modulation
Tutorial 1
Lecture 19 (Part B) - Deriving the common drain amplifier (an incremental VCVS with unity gain)
Lecture 20 - Large signal behavior of the common-drain amplifier, deriving the transconductance (VCCS) and the common-gate (CCCS) amplifiers.
Lecture 21 - The common-gate amplifier
Lecture 22 - The transimpedance amplifier
Lecture 23 - Swing Limits revisited, capacitive coupling considerations
Tutorial 2
Quiz 1 Question Paper
Quiz 1 Solutions
Lecture 24 - Introducing the PMOS transistor - equations, small signal model and the common-source amplifier.
Lecture 25 - Bias Stabilization, Deriving the VCVS, VCCS, CCCS using the PMOS device.
Tutorial 3
Lecture 26 - CCVS using a PMOS device, problems with obtaining high gain with a resistive load, introducing the active load.
Lecture 27 - The active load continued, the CMOS inverter.
Lecture 28 (Part A) - The CMOS inverter, continued.
Lecture 28 (Part B) - Introducing the Bipolar Junction Transistor.
Lecture 29 - BJT Small Signal Model, Bias Stabilization.
Lecture 30 - The NPN transistor continued, bias stabilization, the common collector amplifier.
Lecture 31 - The transconductance amplifier (VCCS), the common base amplifier (CCCS) and the transimpedance amplifier (CCVS), using the npn transistor.
Tutorial 5
Lecture 32 - The re model for BJTs and its utility, the PNP transistor, device bias stabilization, realization of the four controlled sources.
Lecture 33 - Introducing the differential pair.
Lecture 34 - The differential pair continued - common-mode range, half circuit analysis, common-mode rejection ratio.
Lecture 35 - The differential pair continued - more on common-mode rejection, the active load.
Lecture 36 - Differential pair with active load (continued). Introduction to opamp internals : the single stage opamp.
Quiz 2 Question Paper
Quiz 2 Solutions
Lecture 37 - The single stage opamp (contd)., problems with a single stage opamp.
Tutorial 6
Lecture 38 - Problems with a single stage opamp (contd)., the two stage opamp.
Lecture 39 (Part A) - Memory effects in nonlinear circuits, high frequency MOS transistor model, frequency response of the common-source amplifier.
Lecture 39 (Part B) - Frequency response of the common-source amplifier (contd), the Miller effect.
Lecture 40 - Frequency response of the common-source amplifier(contd), frequency response of the common-drain amplifier.
Lecture 41 - Frequency response of the common-drain amplifier(contd) and the common-gate amplifier, effect of forward amplifier bandwidth on the bandwidth of a closed loop system.
Lecture 42 - Stability of feedback systems with first and second order forward amplifiers, conditional stability of a third order forward amplifier.
Lecture 43 - Conditional stability of a third order forward amplifier (contd.), closed loop stabilization by introducing a dominant pole.
Lecture 44 (Part A) - Dominant Pole Compensation (contd), final remarks on stability of feedback systems.
Lecture 44 (Part B) - Opamp gainbandwidth product, circuit techniques for compensation - Miller compensation and its implementation in a two stage opamp.
Tutorial 7
Lecture 45 (Part A) - Applications of operational amplifiers, the noninverting, inverting and summing amplifiers. Effect of finite gain-bandwidth product.
Lecture 45 (Part B) - Input and ground as complements in ideal operational amplifier circuits, the relevance of DC negative feedback in opamp circuits.
Lecture 46 - Inductance simulation using opamps, R and C, second order filters, the Butterworth approximation.
Lecture 47 - Synthesis of a second order active-RC filter with bandpass and low-pass outputs.
Lecture 48 - Synthesis of a biquad with arbitrary numerator, the effect of finite input and output impedance of opamps in feedback amplifiers.
Lecture 49 - Effect of opamp gain-bandwidth product on input and output impedances of feedback amplifiers, output impedance of a voltage regulator, power supply bypassing.


  1. Can U upload solutions for Quiz2 and tutorials too ??

  2. Can you please upload the the tutorials, quiz questions and solns again. It is not in the mediafire anymore.


  3. hello Sir i am Farrukh Reasearch scholar from India sir i am stucking
    in a problem regarding instrumentation amplifer my problem is........
    I want to design Instrumentation Amplifer using two stage CMOS op -amp
    i have designed two stage CMOS Op amp in Tanner EDA which gives 75 dB
    gain with power consumption 300 uW my problem is that i want to
    connect them as 3 Op amp Instrumentation configuration but i dont
    know how to take the values of resistances that are used in 3 Op amp
    instrumentation amplifer such all the MOS transistors used are in
    Saturation i have take arbitrary values as from several books but not
    make all MOS in saturation plz sir i want to know how to take
    values of resistances to make my configuration working plz sir plz
    help me