SECTION 5.1: IMMEDIATE AND REGISTER ADDRESSING MODES
1. Can the programmer of a microcontroller make up new addressing modes?
2. Show the instruction to load 1000 0000 (binary) into R3.
3. Why is the following invalid?
"MOV R2, DPTR"
4. True or false. DPTR is a 16-bit register that is also accessible in low-byte and high-byte formats.
5. Is the PC (program counter) also available in low-byte and high-byte formats?
2. MOV R3,#10000000B
3. Source and destination registers' sizes do not match.
SECTION 5.2: ACCESSING MEMORY USING VARIOUS ADDRESSING MODES
1. The instruction "MOV A, 40H" uses addressing ________mode. Why?
2. What address is assigned to register R2 of bank O?
3. What address is assigned to register R2 of bank 2?
4. What address is assigned to register A?
5. Which registers are allowed to be used for register indirect addressing mode if the data is in on-chip RAM?
1. Direct; because there is no"#" sign
5. RO and Rl
SECTION 5.3: BIT ADDRESSES FOR 1/0 AND RAM
1. True or false. All I/0 ports of the 8051 are bit-addressable.
2. True or false. All registers of the 8051 are bit-addressable.
3. True or false. All RAM locations of the 8051 are bit-addressable.
4. Indicate which of the following registers are bit-addressable.
(a) A (b) B (c) R4 (d) PSW (e) R7
5. Of the 128 bytes of RAM in the 8051, how many bytes are bit-addressable? List them.
6. How would you check to see whether bit DO of R3 is high or low?
7. Find out to which byte each of the following bits belongs. Give the address of the RAM byte in hex.
(a) SETB 2 0 (b) CLR 32 (c) SETB 12H (d) SETB 95H (e) SETB OE6H
8. While bit addresses 00 - 7FH belong to _______________ and bit addresses 80 - F7H belong
9. True or false. PO, Pl, P2, and P3 are part of SFR.
10. True or false. Register ACC is bit-addressable.
4. A, B, and PSW
5. 16 bytes are bit-addressable; they are from byte location 20H to 2FH.
6. MOV A,R3
7. For (a), (b), and (c) use Figure 5-1.
(a) RAM byte 22H, bit 04
(b) RAM byte 24H, bit DO
(c) RAM byte 22H, bit 02
For (d) and (e) use
Figure 5-2. (d) SETB Pl.5 (e) SEIB ACC.6
8. RAM bytes 00 - 20H, special function registers.
SECTION 5.4: EXTRA 128-BYTE ON-CHIP RAM IN 8052
1. True or false. The 8052 is an upgraded version of the 8051.
2. True or false. The 8052 has a total of 256 bytes of on-chip RAM in addition to the SFRs.
3. True or false. The extra 128 bytes of RAM in the 8052 is physically the same RAM as the SFR.
4. Give the address for the upper RAM of the 8052.
5. Show how to put value 99H into RAM location F6H of upper RAM in the 8052.
5. MOV A, #99H
MOV RO, #OF6H