Lecture Notes - Digital Circuit Design by Prof. Shantanu Datts

Digital Circuit Design 

by Prof. Shantanu Datts

Lecture 1:  ECE561/Lectures/ECE 561 - Lecture 1.ppt

Lecture 2:  ECE561/Lectures/ECE 561 - Lecture 2.ppt

Lecture 3:  ECE561/Lectures/ECE 561 - Lecture 3.ppt

Lecture 4: ECE561/Lectures/ECE 561 - Lecture 4 - State Machine Design.ppt

Lecture 5:  ECE561/Lectures/ECE 561 - Lecture 5.ppt - State Machine Design Examples

Lecture 6: State Machine Realizations:ECE561/Lectures/ECE 561 - Lecture 6.ppt

Lecture 7: Using CAD Tools to Implement Digital Circuits:ECE561/Lectures/ECE 561 - Lecture 7.ppt

Lecture 8: Some VHDL Details: ECE561/Lectures/ECE 561 - Lecture 8.ppt

Lecture 9: 

Lecture 10: Clock Skew and Clock Gating : ECE561/Lectures/ECE 561 - Lecture 10.ppt

Lecture 11: Configurable Programmable Logic Devices: ECE561/Lectures/ECE562 - Lect 11.ppt

Lecture 12: Memory ECE561/Lectures/ECE 561 - Lecture 12.ppt

Lecture 13: Memory 2: ECE561/Lectures/ECE 561 - Lecture 13.ppt

Lecture 14:  ECE561/Lectures/ECE 561 - Lecture 14 - System Controller.ppt

Lecture 15:   ECE561/Lectures/ECE 561 - Lecture 15 - Adders.ppt

Lecture 16: Using XILINX - ECE561/Lectures/ECE 561 - Lecture 16 - Heirarchy in Xilinx.ppt

Lecture 17: Sequential machine ex  -ECE561/Lectures/ECE 561 - 762Lect 23 - Project Step 9.ppt

                    and the synthesized results: ECE561/Lectures/The SAR Synthesized Circuit.doc