Topicwise GATE Questions

Topic wise Previous GATE Questions
Electron Devices	Analog Circuits	Digital Circuits	Control Systems	Network Theory
Semiconductors	Diode Applications	Number Systems	Black Diagram Reduction Techniques	KVL, KCL, Mesh & Nodal Analysis
PN Junction (Diode)	Transistor Biasing	Logic Gates	Steady State Error & Error Constants	Network Theorems
Zener Diode	BJT Small signal Analysis	K-Map, SOP and POS	Time Response Analysis	RL, RC, RLC circuits AC analysis
Special Purpose Diodes	BJT at Low and High Frequencies	Combinational Circuits	Routh Hurwitz Stability Criterion	Transient Analysis
Transistor (BJT)	FET Amplifiers	Multiplexers	Root Locus Technique	Steady State Analysis
Junction FET (JFET)	Multistage Amplifiers	Latch & Flip-Flops	Polar and Nyquist Plots	Two Port Networks
MOSFET, CMOS & Introduction to VLSI	Negative Feedback Amplifiers	Shift Registers	Bode Plots	Resonance – Series and Parallel
	Oscillators & Waveform Generators	Counters (Asynchronous & Synchronous)	Gain Margin & Phase Margin	Network Topology & Mutual Inductance
	Power Amplifiers	Semiconductor Memories	Compensators & Controllers	Network Synthesis & Driving Point Impedance
	Operational Amplifiers Set - I   (1987 - 2000) Set - II  (2001 - 2014)	ADC & DAC	State Space Analysis
	Voltage Regulators	Microprocessors & Memory Mapping
		Logic Families