Lecture Material (PPTs) on CAD for VLSI Design ( Part - I ) by Dr. V. Kamakoti

Doctor of Philosophy in Computer Science and Engineering, Indian Institute of Technology, Madras, February 1992 - May 1995. 

Area of Specialization : Theoretical Computer Science 

Title of the Thesis : Randomized Algorithms for Proximity Problems and Reliable Circuit Design.

Master of Science (By Research) in Computer Science and Engineering, Indian Institute of Technology, Madras, 1989 - 1991. 

Area of Specialization : Theoretical Computer Science. 

Title of the Thesis : Algorithmic Aspects of Permutation Graphs.

Bachelor of Engineering in Computer Science and Engineering, Sri Venketeswara College of Engineering, University of Madras, 1985 - 1989.  

Chapters	Topics
Chapter 1	Evolution of CAD Tools
Chapter 2	Importance of Design Automation
Chapter 3	Basic Transistor Fundamentals
Chapter 4	Gate Level Modeling
Chapter 5	Higher Levels of Modeling
Chapter 6	Types of CAD Tools
Chapter 7	Verilog Quick Starter
Chapter 8	Introduction to Simulators
Chapter 9	Verilog Syntax
Chapter 10	Verilog - Operators and expressions
Chapter 11	Hierarchical Design and methodology
Chapter 12	Delay modeling
Chapter 13	Delay Modeling (contd)
Chapter 14	Blocking and Non Blocking Assignments
Chapter 15	Behavioural Modeling
Chapter 16	Verilog Tasks and Functions
Chapter 17	Memory Modeling
Chapter 18	Advanced Delay Modeling
Chapter 19	Advanced Delay Modeling (Contd)
Chapter 20	Verilog Tricks
Chapter 21	Introduction to Logic Synthesis
Chapter 22	Logic Synthesis (Contd)
Chapter 23	Logic Synthesis (Contd)
Chapter 24	Synthesis: Assignment Statements
Chapter 25	Synthesis: Arithmetic Operators
Chapter 26	Synthesis: Bit Selects
Chapter 27	Synthesis: Conditional Statements
Chapter 28	Synthesis: Case Statements
Chapter 29	Synthesis: Case Statements (Contd)
Chapter 30	Synthesis: Loops
Chapter 31	Synthesis: Local & Integer Variables
Chapter 32	Synthesis: Flip Flops with preset / clear
Chapter 33	Synthesis: Blocking Vs Non Blocking Assignments
Chapter 34	Synthesis: Unknowns and High Impedance
Chapter 35	Optimization in Synthesis
Chapter 36	Optimization in Synthesis (Contd)
Chapter 37	Introduction to Reconfigurable Computing
Chapter 38	Introduction to FPGAs
Chapter 39	Introduction to FPGAs (Contd)
Chapter 40	The Altera Quartus Flow
Lab Exercise	Lab 1
	Lab 2
	Lab 3
	Lab 4
	Lab 5
Project	Project - 8279 Display and Keyboard Controller
	Project - USART
	Project - Hough Transform