Search this site

Assignments , Solutions & Lecture Notes or Lecture PPTs on "Integrated Circuit Devices" by Prof. Tsu-Jae King Liu

Video Lecture Series 

University of California, Berkeley
Integrated Circuit Devices by Prof. Tsu-Jae King Liu sir
Dr. Tsu-Jae King Liu
Tsu-Jae King Liu received the B.S., M.S. and Ph.D. degrees in Electrical Engineering from Stanford University in 1984, 1986 and 1994, respectively. She joined the Xerox Palo Alto Research Center as a Member of Research Staff in 1992, to research and develop high-performance thin-film transistor technologies for flat-panel display and imaging applications. In 1996 she joined the faculty of the University of California, at Berkeley, where she is now the Conexant Systems Distinguished Professor and Chair of the Electrical Engineering and Computer Sciences (EECS) Department. From 2000 to 2004 and from 2006 to 2008, she served as the Faculty Director of the UC Berkeley Microfabrication Laboratory. From July 2004 through June 2006 she was Senior Director of Engineering in the Advanced Technology Group of Synopsys, Inc. (Mountain View, CA). From 2008 through 2012, Professor Liu was the Associate Dean for Research in the College of Engineering at UC Berkeley. She also served as Faculty Director of the UC Berkeley Marvell Nanofabrication Laboratory in 2012. Since 2012 she has been serving as Chair of the Electrical Engineering Division in the EECS Department.
Professor Liu's awards include the Ross M. Tucker AIME Electronics Materials Award (1992) for seminal work in polycrystalline silicon-germanium thin films; an NSF CAREER Award (1998) for research in thin-film transistor technology; the DARPA Significant Technical Achievement Award (2000) for development of the FinFET; the Electrical Engineering Award for Outstanding Teaching at UC Berkeley (2003); the IEEE Kiyo Tomiyasu Award (2010) for contributions to nanoscale MOS transistors, memory devices, and MEMS devices; the UC Berkeley Faculty Mentor Award (2010); the Electrochemical Society Dielectric Science and Technology Division Thomas D. Callinan Award (2011) for excellence in dielectrics and insulation investigations; the Intel Outstanding Researcher in Nanotechnology Award (2012); and the SIA University Researcher Award (2014). Her research activities are presently in nanometer-scale logic and memory devices for energy-efficient electronics. She has authored or co-authored over 450 publications and holds over 90 patents.
Professor Liu is a Fellow of the IEEE, and a past member of The Electrochemical Society (ECS), the Society for Information Display (SID), and the Materials Research Society (MRS).

Semiconductor Fundamentals
Lecture 1: Introduction, semiconductor materials, Si structure, electrons and holes
Lecture 2: Energy-band model, doping
Lecture 3: Thermal equilibrium, carrier concentrations
Lecture 4: Carrier drift and mobility, resistivity
Lecture 5: Diffusion, electric potential and field, non-uniformly doped semiconductor
Lecture 6: Generation-recombination; excess carriers
Lecture 7: Continuity equations; minority-carrier diffusion equations; quasi-Fermi levels
Metal-Semiconductor Contacts
Lecture 8: Poisson's equation, work function, M-S energy band diagrams
Lecture 9: I-V characteristics, practical ohmic contacts, small-signal capacitance
pn Junction Diodes
Lecture 10: Electrostatics
Lecture 11: Junction breakdown; ideal diode equation
Lecture 12: Narrow-base diode; charge-control model
Lecture 13: Deviations from the ideal; small-signal model
Lecture 14: Transient response; diode applications
The Bipolar Junction Transistor
Lecture 15: BJT fundamentals, ideal transistor analysis
Lecture 16: Narrow emitter/collector; Ebers-Moll model, base-width modulation
Lecture 17: Early voltage, bandgap narrowing, poly-Si emitter, Gummel plot
Lecture 18: Non-ideal effects, charge control model, base transit time
Lecture 19: Small-signal model, transient response
PNPN Devices
Lecture 20
The MOS Capacitor
Lecture 21: Energy-band diagrams, electrostatics
Lecture 22: Capacitance, effect of oxide charges
Lecture 23: MOS non idealities, VT adjustment, MOSFET structure and operation
The MOS Field-Effect Transistor
Lecture 24: Long-channel MOSFET I-V (square-law theory)
Lecture 25: Long-channel MOSFET I-V (modified), effective mobility, subthreshold leakage
Lecture 26: Small-signal model, velocity saturation; short-channel MOSFET I-V
Lecture 27: Short-channel effect, drain-induced barrier lowering, source/drain engineering
Lecture 28: MOSFET scaling, CMOS technology
Lecture 29: SOI technology, MOS memory devices
Lecture 30: Charge-coupled devices
Course Review
Lecture 31

Homework #1: Si crystal structure; intrinsic semiconductor; doping; carrier concentrations
Assignment (due 1/31/13)

Homework #2: Density of states and the Fermi function; energy band diagram, mobility and drift; resistivity and resistance
Assignment (due 2/7/13)

Homework #3: Nonuniformly doped semiconductor; generation and recombination of carriers; Continuity Equation; quasi-Fermi levels
Assignment (due 2/14/13)

Homework #4: Metal-semiconductor (M-S) energy-band diagrams; M-S electrostatics; practical ohmic contact; small-signal capacitance of a Schottky contact
Assignment (due 2/21/13)

Homework #5: pn junction electrostatics; p-i-n- diode; pn junction diode current components; comparison of Schottky and pn diodes
Assignment (due 2/28/13)

Homework #6: Narrow-base diode; pn junction breakdown; effect of series resistance on diode I-V; effect of recombination-generation in the depletion region
Assignment (due 3/7/13)

Homework #7: pn junction diode charge control model, small-signal model and transient response; photodiode
Assignment (due 3/14/13)
Homework #8: Optoelectronic diodes; MOS capacitor energy band diagrams; MOS threshold voltage; MOS areal charge density
Assignment (due 3/21/13)
Homework #9: MOS C-V characteristics and VT adjustment; effect of oxide charge
Assignment (due 4/4/13)
Homework #10: MOSFET as resistor; Long-channel MOSFET I-V characteristics; impact of body biasing; design project preparation
Assignment (due 4/11/13)
Answers to Problem 4

Homework #11: MOSFET sub-threshold leakage current, small-signal model, velocity saturation, short-channel effect
Assignment (due 4/18/13)

Homework #12: MOSFET with retrograde channel doping; MOSFET source/drain structure; qualitative BJT questions
Assignment - updated 4/21/13 (due 4/25/13)

Homework #13: BJT current components and output characteristics, Ebers-Moll model, deviations from the ideal, Gummel plot
Assignment (due 5/2/13)

Homework #14: BJT small-signal model, base transit time and transient response; advanced MOSFET structuresAssignment (due 5/9/13)

Quiz #1 (2/12/13): Solutions

Quiz #2 (2/26/13): Solutions

Quiz #3 (3/12/13): Solutions

Quiz #4 (4/2/13): Solutions

Quiz #5 (4/16/13): Solutions

Quiz #6 (4/30/13): Solutions

1 comment:

  1. Top Fashion Design Colleges in Pune provide something new, unusual, which never been done before, and wants to create benchmark for others. Students, these days, are very fast- forward, they have their future plans ready with them, by the time they enter senior secondary school.