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Lecture Notes or Lecture Slides on "Advanced Digital System Design (with VHDL & Verilog)" by Dr. R. James Duckworth

Advanced Digital System Design

Dr. R. James Duckworth, AK301, Tel: (508) 831-5204, email:
Office hours: Tue, Wed, Thur, Fri: 10 to 11am.  (send email for other times)

Course Description
This is an introductory course addressing the systematic design of advanced digital logic systems. The emphasis is on top-down design starting with high level models using VHDL as a tool for the design, synthesis, modeling, and testing of highly integrated digital devices. The integration of tools and design methodologies will be addressed through a discussion of system on chip (SOC) integration, methodologies, design for performance, and design for test/testing. Topics: 1. hardware description languages, system modeling, synthesis, simulation and testing of digital circuits; 2. design integration to achieve specific SOC goals including architecture, planning and integration, and testing; 3 use of soft core and IP modules to meet specific architecture and design goals. Laboratory exercises: VHDL models of combinational and sequential circuits, synthesizing these models to programmable logic devices, simulating the design, test-benches, system design and modeling, integration of IP and high level SOC design methodologies.

Textbook:                                                                                                                                            RTL Hardware Design using VHDL – Coding for Efficiency, Portability, and Scalability” by Pong P. Chu, Wiley.


Lecture Notes:

·        Module 1: Introduction

·        Module 2:  VHDL Basics

·        Module 5: Sequential Logic

·        Module 6: State Machines

·        Module 7: Miscellaneous
·        Module 8: Test Benches

·        Advanced Testing using VHDL

·        Verilog Module

·        Verilog Testing Module

                  ·        Embedded Processors (for reference)




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